Impact of Compiler Optimizations on Voltage Droops and Reliability of an SMT, Multi-Core Processor

Provided by: Association for Computing Machinery
Topic: Hardware
Format: PDF
In ultra-low power era, one of the most effective ways of reducing power consumption is to lower supply voltage level. When programs execute on processors, voltage fluctuations can occur due to sudden changes in current draw between successive instructions. Such voltage fluctuations can reduce the voltage levels below acceptable levels and cause unreliable operation in microprocessors. Voltage droops due to di/dt effects have been studied in the past; however no prior work studies the effect of compiler optimizations on voltage droops. Past work has studied the impact of compiler optimizations on performance and power, but not reliability. In this paper, the authors analyze voltage droops with different compiler optimization levels.

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