Implementation of 64-Bit Decimal Matrix Code for Correcting Cell Upsets in Static Random Access Memories

In this paper, novel per-word 64- bit DMC was proposed to assure the reliability of memory. Here to detect and correct maximum 32 errors. The proposed protection code utilized decimal algorithm to detect errors, so that more errors were detected and corrected. The obtained results showed that the proposed scheme has a superior protection level against large MCUs in memory. Besides, the proposed decimal error detection technique is an attractive opinion to detect MCUs in CAM because it can be combined with BICS to provide an adequate level of immunity.

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