Implementation of AHB Protocol Using FPGA

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Provided by: Creative Commons
Topic: Hardware
Format: PDF
Resolution is a big issue in SoC (System-on-Chip) while dealing with number of masters trying to sense a single data bus. The effectiveness of a system to resolve this priority resides in its ability to logical assignment of the chance to transmit data width of the data, response to the interrupts, etc. This paper is to propose the scheme to implement such a system using the specification of AMBA bus protocol. The paper involves the typical AMBA features of 'Single clock edge transition', 'Split transaction', 'Several bus masters' and 'Burst transfer'.
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