Implementation of Back Propagation Algorithm in Verilog
In this paper, a design method of neural networks based on Verilog Hardware Description Language (HDL), implementation is proposed. A design of a general neuron for topologies using back propagation algorithm is described. The sigmoid non-linear activation function is also used. The neuron is then used in the design and implementation of a neural network using Xilinx Spartan-3E FPGA. The simulation results obtained with Xilinx ISE 9.2i software. The back propagation algorithm is one of the most useful algorithms of ANN training. In this paper, the authors present the neuron implementation for the in topologies that are suitable for this algorithm.