Implementation of Floating Point Multiplier on Reconfigurable Hardware and Study Its Effect on 4 Input LUT's

Provided by: International Journal of Advanced Research in Computer Science and Software Engineering (IJARCSSE)
Topic: Hardware
Format: PDF
Floating point multiplication is a most widely used operation in DSP/Math processors, robots, air traffic controller, digital computers. Because of its vast areas of application, the main emphasis is on the implementing it effectively such that it uses less combinational delay with high Speed. Floating point operations are hard to implement on FPGAs i.e. on reconfigurable hardware's because of their complexity of their algorithms. On the other hand, many scientific problems require floating point arithmetic with high level of accuracy in their calculations.

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