Implementation of Multi-Slave Interface for AXI Bus

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Provided by: Creative Commons
Topic: Hardware
Format: PDF
With the need of application, chip with a single processor can't meet the need of more and more complex computational task. The authors are able to integrate multiple processors on a chip. Multi-Processor System-on-Chip (MPSoC) which gives a solution to this requires efficient on-chip communication architectures to support high data bandwidth and increase parallelism. The traditional form of interconnection between multiple cores usually is on-chip bus (such as AHB and Avalon), which determiners the performance of MPSoC.
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