Implementation of Network Security Algorithm on FPGA

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Provided by: International Journal of Advanced Research in Computer Science & Technology (IJARCST)
Topic: Security
Format: PDF
The electronic data transmission in a network is done in a safe and secure way with the help of Advanced Encryption Standard (AES), a Federal Information Processing Standard (FIPS). The AES can be programmed in software or built with hardware. The paper presents a hardware implementation of the AES algorithm. The AES was implemented in FPGA using Spartan 3E kit and Xilinx ISE development suite. The use of FPGA for cryptographic applications is highly attractive for variety of reasons but at the same time there are many open issues related to the general security of FPGAs.
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