Implementation of Soft Processor Based SOC for JPEG Compression on FPGA

Provided by: Creative Commons
Topic: Hardware
Format: PDF
With the advent of semiconductor process and EDA tools technology, IC designers can integrate more functions. However, to reduce the demand of time-to-market and tackle the increasing complexity of SoC, the need of fast prototyping and testing is growing. Taking advantage of deep sub-micron technology, modern FPGAs provide a fast and low-cost prototyping with large logic resources and high performance. So, the hardware is mapped onto an emulation platform based on FPGA that mimics the behavior of SOC.

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