Implementation of SRAM Array by Using Multibit Flip-Flop
Memory elements play a vital role on digital world. In memory devices, the most important factor is power consumption. Because the power consumption of the memory device increases means, the device reliability and life time is reduced. The basic memory elements of designer considerations are Latch and flip-flop. In this paper, the authors design SRAM using arrays of flip-flops and they analyze the design of Single-Bit Flip-Flop (SBFF i.e. 1-bit) and made performance comparison over the Multi-Bit Flip-Flop (MBFF i.e. 2-bit, 4-bit, 8-bit, 16-bit and 32-bit).