Improved FPGA-Based Area Estimation Method for Hardware/Software Partitioning

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Provided by: AICIT
Topic: Hardware
Format: PDF
To aid in the hardware and software partitioning of the reconfigurable system, fast yet accurate hardware area estimations are necessary before the partitioning. Most of area estimation works predict the area in terms of the basic programmable building blocks Look Up Table (LUT). Few works estimate the usage of the other major and finest unit, for example on-chip Digital Signal Processing (DSP) blocks. In addition, the usage of the DSP blocks would seriously influence the usage of the used LUT.
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