Improving Performance and Reducing Energy-Delay with Adaptive Resource Resizing for Out-of-Order Embedded Processors

Provided by: Association for Computing Machinery
Topic: Hardware
Format: PDF
While Ultra Deep Sub-Micron (UDSM) CMOS scaling gives embedded processor designers ample silicon budget to increase processor resources to improve performance, restrictions with the power budget and practically achievable operating clock frequencies act as limiting factors. In this paper, the authors show how just increasing processor resource size is not effective in improving performance due to constraints on achievable operating clock frequency. In response, they propose two adaptive resource resizing techniques L2RS and L2ML1RS that adaptively resize resources by exploiting cache misses.

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