Increasing the Effectiveness of Directory Caches by Avoiding the Tracking of Noncoherent Memory Blocks

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Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
A key aspect in the design of efficient multiprocessor systems is the cache coherence protocol. Although directory-based protocols constitute the most scalable approach, the limited size of the directory caches together with the growing size of systems may cause frequent evictions and, consequently, the invalidation of cached blocks, which jeopardizes system performance. Directory caches keep track of every memory block stored in processor caches in order to provide coherent access to the shared memory. However, a significant fraction of the cached memory blocks do not require coherence maintenance (even in parallel applications) because they are either accessed by just one processor or they are never modified.
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