Instruction Scheduling for Reliability-Aware Compilation

Download Now
Provided by: Association for Computing Machinery
Topic: Hardware
Format: PDF
Soft errors have emerged as a non-negligible design challenge in hardware/software systems and their importance is likely to increase further in upcoming technology generations because the transistor dimensions and operating/threshold voltages keep on shrinking eventually leading to further reduction of the critical charge. An instruction scheduling technique is presented that targets at improving the reliability of a software program given a user-provided tolerable performance overhead. A look-ahead-based heuristic schedules instructions by evaluating the reliability of dependent instructions while reducing the impact of spatial and temporal vulnerabilities of various processor components.
Download Now

Find By Topic