Integrated Microarchitectural Floorplanning and Run-time Controller for Inductive Noise Mitigation

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Provided by: Association for Computing Machinery
Topic: Hardware
Format: PDF
In this paper, the authors propose a design methodology using two complementary techniques to address high-frequency inductive noise in the early design phase of a microprocessor. They propose a noise-aware floorplanning technique that uses microarchitectural profile information to create noise-aware floorplans. They present the design of a dynamic inductive-noise controlling mechanism at the microarchitectural level, which limits the on-die current demand within predefined bounds, regardless of the native power and current characteristics of running applications.
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