Integrated Temporal Planning, Module Selection and Placement of Tasks for Dynamic Networks-on-Chip

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Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
In this paper, dynamic module selection is integrated in a scheduling and placement flow of tasks for a Dynamic Network-on-Chip (DNoC). Several implementations (modules) of a task are considered, which differ in size and execution time. In contrast, most state-of-the-art flows consider one module per task, therefore having a static module selection during compile time. Tasks arrive and need to be scheduled and placed by finding a feasible start time and place, such that they meet their deadlines and area requirements. Tasks that do not meet these requirements are rejected.
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