Adders are the critical parts of processor circuits. There is a great demand for high performance processors, which increases the need for improving the performance and functionality of adders. Carry Look-ahead Adder (CLA) adder's principle remains dominant in High-speed adder architectures, since the carry delay can be improved by calculating each stage in parallel. This is done by using an 8-bit Manchester Carry Chain (MCC) adder block in multi-output domino CMOS logic. MCC is the most common dynamic (domino) CLA adder architecture in VLSI.