University of Toledo
An increasing number of architectural techniques rely on hardware Counting Bloom Filters (CBFs) to improve upon the energy, delay and complexity of various processor structures. CBFs improve the energy and delay of membership tests by maintaining an imprecise and compact representation of a large set to be searched. This paper studies the energy, delay, and area characteristics of two implementations for CBFs using full custom layouts in a commercial 0.13 fabrication technology. One implementation, S-CBF, uses an SRAM array of counts and a shared up/down counter.