Leakage Power Reduction of On Chip SRAM Cells
Exponential growth of battery based portable applications mandatory new SRAM cell but this cell stand by leakage power has become a major issue in recent trend low power fabrication with technology scaling and for high temperature operations. In this paper, the authors have emphasized on low power dissipation, read/write delay and stability of SRAM cell. This paper shows the performance of a new LP12T cell. The proposed LP12T cell is compared with traditional LP10T and 6T cell on Microwind 3.1 simulator using BSIM4 model for 120nm and 65nm at wide range of temperature.