Journal of Semiconductor Technology and Science (JSTS)
Reconfigurable array architecture is recently attracting much attention. It is a flexible hardware architecture, which can dynamically change its configuration to execute various functions while maintaining high performance. However, pursuing flexibility and performance at the same time leads to complexity, thereby makes the mapping of applications a difficult process. There have been attempts to use compiler or high level synthesis techniques to solve the problem. In this paper, the authors propose yet another method, which uses libraries for the mapping to provide an abstraction of the internal structure and at the same time to reduce the development time and efforts through the automated process.