Provided by: International Journal of Computer Applications
Date Added: May 2012
In this paper, the authors propose that several FFT algorithms such as radix-2, radix-4 and split radix were designed using VHDL with the multiplication complexity reduced more than 30% by using the newly proposed CSD constant multipliers instead of the programmable multipliers and the simulations of standard 0.35um. The sizes of FFT/IFFT operations are varied in different applications of OFDM systems. The reorganized mixed Radix 4-2 butterfly FFT with bit reversal for the output sequence derived by index decomposition execution is their suggested VLSI system architecture to design the module FFT/IFFT processor for OFDM systems.