Low Power DCT Architecture for Image/Video Coders

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Provided by: International Publisher for Advanced Scientific Journals (IPASJ)
Topic: Hardware
Format: PDF
As 2-D DCT (Discrete Cosine Transform) algorithms are the most typical for multimedia applications, the main focus of this project will be on the efficient hardware implementations of 2-D DCT. As the number of applications that require higher dimensional DCT algorithms is growing, a special attention will be given to the algorithms that are easily extensible to higher dimensional cases. The goal of this project will be to implement DCT on FPGA (Field Programmable Gate Array). In this paper, a 2D-DCT core is considered and it is two dimensional discrete cosine transform implementation designed for use in compression systems like JPEG (Joint Photographic Expert Group).
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