International Journal of Computer Applications
Now-a-days, low power design has become a critical need of technologies due to high demand of portable devices. The magnitude comparator is one of the fundamental arithmetic components of digital system with many applications such as: Digital Signal Processors (DSP) for data processing, encryption devices and microprocessor for decoding instruction. This paper presents a new low power 2-Bit magnitude comparator using full adder technique. The proposed magnitude comparator has been compared with existing magnitude comparator.