Low Power Novel Hybrid Adders for Datapath Circuits in DSP Processor

Provided by: Creative Commons
Topic: Hardware
Format: PDF
A majority of the portable multimedia embedded devices like mobile phone, notebook computers which interfaces with information from the real-world environment are essentially Digital Signal Processing (DSP) circuits whose main building block is a Multiplier-ACcumulator (MAC). The performance of the full adders that are a part of the MAC unit can significantly affect the efficiency of the whole system. Hence the reduction of power consumption in full adder circuit is necessary for low power applications. In this paper, the various adder cell circuits are implemented using different CMOS logic structures and their performance is analyzed in 130nm technology.

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