International Journal Of Engineering And Computer Science
Analog multipliers are important circuit blocks for many applications such as frequency mixers, variable frequency oscillators, adaptive filters, neural networks automatic gain control, amplitude modulation, etc. A new CMOS voltage-mode Four-quadrant analog multiplier is proposed and analyzed by applying inputs signals to set of Summation circuit and substractor. Based on the proposed multiplier circuit, a low voltage high performance CMOS four quadrant analog multiplier is designed and simulated by using 0.35 micron technology. The measured 3dB bandwidth is 15MHz. Simple structure, low-voltage, low power, and high performance makes the proposed multiplier quite feasible in many applications.