Provided by: University of Engineering and Technology, Taxila
Date Added: Feb 2014
In this paper, the authors present the design for High performance Energy Efficient 64-bit Arithmetic Logic Unit (ALU). For making ALU high performance they are scaling the frequency from 125GHz to 1THz and for making it energy efficient, they are using Low Voltage Transistor Transistor Logic (LVTTL) IO standard. It is observed that on scaling down the frequency from 1THz to 125GHz, IO power reduced up to 87.50% for drive strength 4mA, 8mA, 12mA, 16mA. This design is implemented on Airtex-7 FPGA, XC7A100T device and - 1 speed grade.