MAPG: Memory Access Power Gating

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Provided by: European Design and Automation Association
Topic: Storage
Format: PDF
In mobile systems, the problems of short battery life and increased temperature are exacerbated by wasted leakage power. Leakage power waste can be reduced by power-gating a core while it is stalled waiting for a resource. In this paper, the authors propose and model Memory Access Power Gating (MAPG), a low-overhead technique to enable power gating of an active core when it stalls during a long memory access. They describe a programmable two-stage power gating switch design that can vary a core's wake-up delay while maintaining voltage noise limits and leakage power savings.
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