Memory Access Control in Multiprocessor for Real-time Systems with Mixed Criticality

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Provided by: University of Illinois at Urbana Champaign
Topic: Hardware
Format: PDF
Shared resource access interference, particularly memory and system bus, is a big challenge in designing predictable real-time systems because its worst case behavior can significantly differ. In this paper, the authors propose a software based memory throttling mechanism to explicitly control the memory interference. They developed analytic solutions to compute proper throttling parameters that satisfy schedulability of critical tasks while minimize performance impact caused by throttling. They implemented the mechanism in Linux kernel and evaluated isolation guarantee and overall performance impact using a set of synthetic and real applications.
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