Memory-Aware Thread and Data Mapping for Hierarchical Multi-Core Platforms

Provided by: INRIA
Topic: Storage
Format: PDF
In parallel programs, the threads of a given application must cooperate in order to accomplish the required computation. However, the communication time between the tasks may be different depending on which core they are executing and how the memory hierarchy and interconnection are used. The problem is even more important in multi-core machines with NUMA characteristics, since the remote access imposes high overhead, making them more sensitive to thread and data mapping. In this paper, thread and data mapping are techniques that provide performance gains by improving the use of resources such as interconnections, main memory and cache memory.

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