Memory Bank Aware Dynamic Loop Scheduling

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Provided by: edaa
Topic: Storage
Format: PDF
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied in the past, and several schemes, both static and dynamic, have been pro-posed. One of the attractive features of dynamic schemes, as com-pared to their static counterparts, is their ability of exploiting the latency variations across the execution times of the different loop iterations. In all the dynamic loop scheduling techniques proposed in literature so far, performance has been the primary metric of interest.
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