Modeling Process Synchronization in Multiprocessor Systems on Chip (MPSoC)

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Provided by: University of California, Davis
Topic: Hardware
Format: PDF
Increasing application complexity and short time to market have led to the wide use of transaction level modeling and platform based design of Multi-Processor System-on-Chips (MPSoCs). However, their models use one-case-fits-all communication scheme or leave the communication and process synchronization to be designed manually. In this paper, the authors provide the designer with a taxonomic set of process synchronization schemes for MPSoCs. All schemes are classified and implemented in their modeling tool. Using the tool, the designer can insert each scheme in the Transaction Level Model (TLM) generated by their tool.
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