Modeling Shared-Memory Multiprocessor Systems with AADL

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Provided by: RWTH Aachen University
Topic: Hardware
Format: PDF
Multiprocessor chips are now commonly supplied by IC manufacturers. Real-time applications based on this kind of execution platforms are difficult to develop for many reasons: complexity, design space and unpredictability. The allocation of the multiple hardware resources to the software entities could have a great impact on the final result. Then, if the interest to represent the set of hardware computing resources inside an architectural model is obvious, the authors argue that other hardware elements like shared buses or memory hierarchies must be included in the models if analyze of the timing behavior is expected to be performed.
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