Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic

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Provided by: IBM
Topic: Hardware
Format: PDF
Two important trends driving microprocessor performance are scaling of device feature sizes and increasing pipeline depths. In this paper, the authors explore how these trends affect the susceptibility of microprocessors to soft errors. Device scaling is the reduction in feature size and voltage levels of the transistors, which improves performance because smaller devices require less current to turn on or off, and thus can be operated at higher frequencies. Pipelining is a microarchitectural technique of dividing instruction processing into stages which can operate concurrently on different instructions.
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