International Association of Engineering and Management Education (IAEME)
RSA is one of the most widely adopted public key algorithms at present and it requires repeated modular multiplications to accomplish the computation of modular exponentiation. A famous approach to implement modular multiplication in hardware circuits is based on the Montgomery modular multiplication algorithm since it has many advantages. To speed up the encryption/decryption process, many high-speed Montgomery modular multiplication algorithms and hardware architectures employ carry-save addition. But CSA based architecture increases the area. In this paper, in order to reduce the area of the CSA based multiplier, an area-efficient algorithm called double add reduce algorithm is introduced.