Montgomery Multiplication Using Vector Instructions

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Provided by: International Association for Cryptologic Research
Topic: Security
Format: PDF
In this paper the authors present a parallel approach to compute interleaved montgomery multiplication. This approach is particularly suitable to be computed on 2-way single instruction, multiple data platforms as can be found on most modern computer architectures in the form of vector instruction set extensions. They have implemented this approach for tablet devices which run the x86 architecture (Intel Atom Z2760) using SSE2 instructions as well as devices which run on the ARM platform (Qualcomm MSM8960, NVIDIA Tegra 3 and 4) using NEON instructions.
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