MRTS:Run-Time System for Reconfigurable Processors With Multi-Grained Instruction-Set Extensions

Provided by: edaa
Topic: Hardware
Format: PDF
The authors present a run-time system for a multi-grained reconfigurable processor in order to provide a dynamic trade-off between performance and available area budgets for both fine-as well as coarse-grained reconfigurable fabrics as part of one reconfigurable processor. Their run-time system is the first implementation of its kind that dynamically selects and steers a performance-maximizing multi-grained instruction set under run-time varying constraints. It achieves a performance improvement of more than 2x compared to state-of-the-art run-time systems for multi-grained architectures. To elaborate the benefits of their approach further, they also compare it with offline- and online-optimal instruction-set selection schemes.

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