Multi-Layered Cryptographic Processor for Network Security
This paper presents a multi-layered architecture for the security of network and data using a layered structure of cryptographic algorithms. This architecture gives benefit of low area and high speed requirement. This paper mainly concern for security so architecture is designed in layers to avoid the possibilities of invasion from outsiders. This paper implements a combination of Private-Public-Private key algorithm for encryption-decryption in two layers and a Public key for key generation. Simulation of codes is carried out on ModelSim 6.3f and design optimization is shown using Xilinx-Project Navigator ISE 13 suite. This paper proposes multi-layered architecture of integrated cryptographic processor which can be used for any byte length.