Multicore Soft Error Rate Stabilization Using Adaptive Dual Modular Redundancy

Provided by: edaa
Topic: Hardware
Format: PDF
The use of Dynamic Voltage and Frequency Scaling (DVFS) in contemporary multi-cores provides significant protection from unpredictable thermal events. A side effect of DVFS can be an increased processor exposure to soft errors. To address this issue, a flexible fault prevention mechanism has been developed to selectively enable a small amount of per-core Dual Modular Redundancy (DMR) in response to increased vulnerability, as measured by the processor Architectural Vulnerability Factor (AVF). The authors' new algorithm for DMR deployment aims to provide a stable effective Soft Error Rate (SER) by using DMR in response to DVFS caused by thermal events.

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