Institute of Electrical & Electronic Engineers
Due to the rapid decrease of technology feature size speed related faults, such as Address Decoder Delay Faults (ADDFs), are becoming very important. In addition, increased leakage currents demand for improved tests for Bit Line Imbalance Faults (BLIFs) (caused by memory cell pass transistor leakage). This paper contributes to new and improved algorithms for detecting these faults. It provides an improved version of existing GalPat algorithm and introduces two new algorithms to detect ADDFs; the paper also shines a new light on the use of the different stress combinations (counting methods and data-backgrounds) and their importance for the detection of ADDFs.