International Journal on Computer Science and Technology (IJCST)
In the era of parallel processing the multistage interconnection networks are frequently projected as connections in multiprocessor systems to interconnect several processors with several memory modules or processors. The design of a suitable interconnection network for inter-processor communication is one of the key issues of the system performance. In this paper, a new irregular interconnection network NIASN (New Irregular Augmented Shuffle Network) has been proposed. Proposed NIASN achieve a significant improvement over some other popular MINs in terms of permutation possibility and cost-effectiveness.