International Journal of Engineering Research and Development (IJERD)
In this paper, two novel Hybrid Adders are proposed for Multiplier Accumulator Unit (MAC) of low power DSP application. Adders are the most important component of the MAC unit which can significantly affect the efficiency of the whole system. Thus, power reduction in Full adder circuit is essential for low power applications. These novel full adders are simulated in 90 nm Technology with BSIM model at 27 Degree temperature. The performance of power, delay, voltage swing, power delay product and area of these Hybrid adders are studied at various low supply voltages (0.8V, 0.9V & 1.0V), and compared with the other five adders.