In this paper, the authors propose the design and implementation of On-The-Fly (OTF) computation of round keys of Advanced Encryption Standard (AES) for all key sizes. The OTF implementation architecture has ensured generation of round key of 128 bits each for the input cipher key sizes of 128, 192 and 256 bits. The implementation was targeted on 180nm CMOS technology using standard cell libraries. Key expansion unit is such designed that, it can be used for both encryption and decryption of AES. The design was clocked at 179MHz to generate 128-bit round keys at a throughput of 22.912Gbps.