On the Systematic Creation of Faithfully Rounded Truncated Multipliers and Arrays

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Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
Often, when performing fixed-point multiplication, it is sufficient to return a faithfully rounded result, i.e. the machine representable number either immediately above or below the arbitrary precision result, if the latter is not exactly representable. Compared to correctly rounded multipliers, i.e. those returning the nearest machine representable number, faithfully rounded multipliers use considerably less silicon area, typically by implementing a truncation scheme within the partial product array. A number of such heuristically inspired schemes exist in the literature, however their use in industrial practice is hampered by the absence of verification, and exhaustive simulation is typically infeasible, and e.g. a 32 bit multiplier requires simulations.
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