Onchip Interconnect Exploration for Multicore Processors Utilizing FPGAs

Provided by: University of Colorado
Topic: Hardware
Format: PDF
Dual core microprocessors are currently available and higher processor-count architectures will dominate the multicore market. A complex part of these higher order multicore designs will be the interconnection scheme that exists onchip and how exactly that interconnection is best used and configured. While FPGAs currently support a variety of onchip bus interconnects, there is a gap in the tools to provide Network-on-Chip (NoC) exploration. A Network-on-Chip (NoC) is an onchip packet switched network that is used for computational elements to communicate with each other.

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