Online Cache State Dumping for Processor Debug

Provided by: Association for Computing Machinery
Topic: Hardware
Format: PDF
Post-silicon processor debugging is frequently carried out in a loop consisting of several iterations of the following two key steps: processor execution for some duration, followed by dumping out of the processor's internal state into an external logic analyzer for further offline processing. Internal state of the processor is dominated by the L2 cache. During the process of dumping the cache content, the processor's execution is halted so that the state can be faithfully reproduced offline.

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