OpenCL for FPGAs: Prototyping a Compiler

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Provided by: University of Florence
Topic: Hardware
Format: PDF
Hardware acceleration using FPGAs has shown orders of magnitude reduction in runtime of computationally-intensive applications in comparison to traditional stand-alone computers. This is possible because on an FPGA many computations can be performed at the same time in a truly-parallel fashion. However, parallel computation at a hard-ware level requires a great deal of expertise, which limits the adoption of FPGA-based acceleration platforms. A recent interest to enable software programmers to use GPUs for general-purpose computing has spawned an interest in developing languages for this purpose.
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