International Journal of Engineering, Science and Innovative Technology (IJESIT)
Although many different low-power Error Correction Circuits (ECCs) implementations have been articled, to date there has not been any comprehensive study to evaluate the comparative efficiencies of alternative analog and digital implementations. This has led to a significant analysis of the varied analog and digital iterative message passing algorithms. These algorithms operate on decoders. The inefficiency and high cost constraints of decoders have led to significant loss in data transfer rate. Algorithms like min-sum algorithm for analog belief prorogation decoders and Viterbi algorithm for turbo decoders are coded and simulate in this paper.