Optimal Architectures for Massively Parallel Implementation of Hard Real-Time Beamformers

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Provided by: University of Texas at Arlington
Topic: Hardware
Format: PDF
In this paper, the authors reports an experimental analysis of real-time computational architectures applied to digital time delay beamformation. The goal of this research has been to identify the most efficient multiprocessor utilization for a prototypical beamformer by modeling the signal processing and applying selected multiprocessor scheduling algorithms. A Synchronous DataFlow (SDF) domain model was used to implement the most computationally intense core of the beamformer in Ptolemy. In order to evaluate multiprocessor scheduling performance, four automated scheduling strategies were applied: declustering, a classical list scheduler, dynamic-level scheduler, and hierarchical scheduler.
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