Optimal Polynomial-Time Interprocedural Register Allocation for High-Level Synthesis and ASIP Design

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Provided by: Ecole Polytechnique Federale de Lausanne
Topic: Hardware
Format: PDF
Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is to allocate the minimum number of registers such that no scalar variable is spilled to memory. Previously, an optimal polynomial-time algorithm for this problem has been presented for individual procedures represented in Static Single Assignment (SSA) Form. This result is now extended to complete programs (or sub-programs), as long as: each procedure is represented in SSA Form and at every procedure call, all live variables are split at the call point.
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