Optimal Simultaneous Mapping and Clustering for FPGA Delay Optimization

Provided by: Association for Computing Machinery
Topic: Big Data
Format: PDF
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry out these two synthesis steps sequentially. Such a two-step approach cannot guarantee that the final delay of the circuit is optimal, because the quality of clustering depends significantly on the initial mapping result. To address this problem, the authors develop an algorithm that performs mapping and clustering simultaneously and optimally under a widely used clustering delay model. To their knowledge, their algorithm, named SMAC (Simultaneous Mapping And Clustering) is the first delay-optimal algorithm to generate a synthesis solution that considers a combination of both steps.

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