IOSR Journal of Engineering
Discrete Cosine Transform (DCT) is a widely used tool in image and video compression applications. Recently, the high-throughput DCT designs have been adopted to fit the requirements of real-time application. Operating the shifting and addition in parallel, an Error-Compensated Adder-Tree (ECAT) is proposed to deal with the truncation errors and to achieve low-error and high-speed Discrete Cosine Transform (DCT) design. Instead of the 12 bits used in previous works, 9-bit Distributed Arithmetic was proposed. DA-based DCT design with an Error-Compensated Adder-Tree (ECAT) is the proposed architecture in which, ECAT operates shifting and addition in parallel by unrolling all the words required to be computed.